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# Memory

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CS 130 // 2024-10-17

# Announcements \& Reminders

## Vermeer Digital Bulldogs

https://www.drake.edu/cs/internships/vermeerdigitalbulldogs/

Deadline extended to October 22nd

## Wellmark BlueX (first years)

https://www.drake.edu/cs/internships/wellmarkbluextechnologyappliedlearningprogram/

Also extended to October 22nd

## Exam 2 is due Tuesday

* Same set up as Exam 1
* Asynchronous
* Attendance is optional on Tuesday 
    - You can come work on the exam
    - Ask questions about assignments

## Office Hours limited today

2:00 - 2:25pm

I have to present at an admissions event at 2:30

## Assignment 6 is due today

Soft extension to next Tuesday
* get it in today if you can 
* if you need to wait so you can ask me questions next Tuesday, that's fine

# Review

## Sequential Logic
- **Sequential** logic circuits have memory
    + 
 Output depends on both the input and current state of memory
    + 
 Behavior can change **over time**

### Sequential Logic Components
- **Clock**: a signal that oscillates between 0 and 1
- 
 **Latch**: 1-bit memory element that is updated when the clock is 1
- 
 **Flip Flop**: 1-bit memory element that is updated when the clock transitions from a 1 to a 0
- 
 **Register**: multi-bit memory unit (32 or 64 bits) that consists of an array of flip flops or latches
- 
 **Register Files**: An array of registers

# ROM

## ROM: Read-Only Memory

- Intended only to be read from (though it may be possible to change it in some circumstances)
- **Non-volatile**: keeps its value without power
- Game Cartidges, CD-ROM, DVD
- Firmware for PCs and other devices
  + contains boot-up instructions

![CD ROM](../../assets/images/CD-ROM.png) 
![game cartridge](../../assets/images/gamecartridge.jpg)

# RAM

## RAM: Random Access Memory
- It takes the same amount of time to access data regardless of where it is

![RAM modules](../../assets/images/ram.jpg)

## Static Random Access Memory
- Memory where data is stored *statically* with flip-flops
- Faster than DRAM but less dense (lower capacity) and more expensive per bit
- As long as it has power, SRAM will keep its value
- Usually used for cache memory

## Dynamic Random Access Memory
- DRAM is the most dense RAM
    * Implemented with capacitors instead of latches - stores energy in an electrical field
- Must be occasionally "refreshed" because the capacitors slowly lose their stored values
    * This is why it is called "dynamic"
- Usually used for large capacity RAM

## Instruction Memory on the CPU

![Instruction Fetch](/Fall2024/CS130/assets/images/COD/instruction_fetch.png)

## Demo: Make it in Logisim

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Use a ROM to simulate instruction memory

- 16 bit address (should be 32 for MIPS, but that is too big for Logisim)
- Quad output - so we can read four bytes at a time
- lowest-address byte is shown first in Logisim memory contents

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![MIPS program in Logisim](../../assets/images/mips-for-logisim-rom.png)

![MIPS program in MARS](../../assets/images/mips-for-logisim-mars.png)

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## Exercise

- Create a Program Counter Register which iterates through the instructions in memory

![Instruction Memory in Logisim](../../assets/images/instruction-memory-logisim.png)

## Exercise

- You can set your splitter to have custom fan-out ranges
- Make a separate pin for each instruction field (opcode, rs, rt, etc.)

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![Custom Ranges for Splitter](../../assets/images/custom-splitter.png)

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![R-Type format](../../assets/images/COD/r-type-instruction.png) 
![I-Type format](../../assets/images/COD/i-type-instruction.png)

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